クロックスキュー
1. Clock skewIn a synchronous circuit clock skew (TSkew) can be defined as the difference in the arrival time between two sequentially-adjacent registers. Given two sequentially-adjacent registers Ri and Rj with clock arrival times at register clock pins as TCi and TCj respectively, then clock skew can be defined as : TSkew i,j = TCi - TCj Clock skew can be positive or negative. If the clock signals are in complete synchronicity, then the clock skew observed at these registers is zero.
Read “Clock skew” on English Wikipedia
Read “クロックスキュー” on Japanese Wikipedia
Read “Clock skew” on DBpedia
Read “Clock skew” on English Wikipedia
Read “クロックスキュー” on Japanese Wikipedia
Read “Clock skew” on DBpedia
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